NXP Semiconductors /LPC18xx /USB0 /HCSPARAMS

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Interpret as HCSPARAMS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0N_PORTS0 (PPC)PPC 0RESERVED 0N_PCC0N_CC0 (PI)PI 0RESERVED 0N_PTT0N_TT0RESERVED

Description

Host controller structural parameters

Fields

N_PORTS

Number of downstream ports. This field specifies the number of physical downstream ports implemented on this host controller.

PPC

Port Power Control. This field indicates whether the host controller implementation includes port power control.

RESERVED

These bits are reserved and should be set to zero.

N_PCC

Number of Ports per Companion Controller. This field indicates the number of ports supported per internal Companion Controller.

N_CC

Number of Companion Controller. This field indicates the number of companion controllers associated with this USB2.0 host controller.

PI

Port indicators. This bit indicates whether the ports support port indicator control.

RESERVED

These bits are reserved and should be set to zero.

N_PTT

Number of Ports per Transaction Translator. This field indicates the number of ports assigned to each transaction translator within the USB2.0 host controller.

N_TT

Number of Transaction Translators. This field indicates the number of embedded transaction translators associated with the USB2.0 host controller.

RESERVED

These bits are reserved and should be set to zero.

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